Decompositional Design of Testable FSM Networks

It has been well-known that Finite State Machines (FSMs) are difficult to test. The problem of FSM testing can be regarded as an identification problem: to design input sequence (test) capable to distinguish a given (fault-free) FSM from all other (faulty) ones. Testing methods based on checking experiments theory [1,2] are not widely used in practical, because of the high upper bound of checking sequence length. This upper bound essentially depends on the existence of distinguishing sequence (DS) for FSM and its length. It is known that not every FSM has DS, which can make test design process still more difficult. There are several approaches to reduce the length of checking sequences by transforming the source FSM into „more testable“ one [6-9,11-13 and many others].